The Open Programmable Acceleration Engine (OPAE)
ثبت نشده
چکیده
The rising scales of FPGA deployments, especially in cloud environments scaling Accelerationas-a-Service, or for datacenter-wide workload acceleration, have created an urgent need for a unified and simple software interface to discover, access, and manage reconfigurable resources. Current system design methodologies either abstract FPGA access and resource management to provide a domain-specific interface, or generate RTL outputs that leave the actual integration to the developer, providing very limited system debug and deployment support.
منابع مشابه
Simplify Software Integration for FPGA Accelerators with OPAE
The rising scales of FPGA deployments especially in cloud environments scaling Acceleration as-a-Service or for datacenter-wide workload acceleration have created an urgent need for a unified and simple software interface to discover, access, and manage reconfigurable resources. Current system design methodologies either abstract FPGA access and resource management to provide a domain-specific ...
متن کاملAn FPGA Implementation of Reciprocal Sums for SPME
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is the computation of the Coulombic interactions using the Smooth Particle Mesh Ewald (SPME) algorithm. In this work, we describe the design, the implementation, and the verification effort of an FPGA compute engine, nam...
متن کاملReaping the Benefits of SoC Processors for Video Applications White Paper
tomization and advanced feature updates. Original equipment manufacturers (OEMs) often need to use the same system platform across a range of products that are tailored for specific markets; or they need to combine different applications in the same system, such as a security camera with object recognition, or an IPTV set-top box (STB) with integrated video phone or digital media adapter capabi...
متن کاملA Reconfigurable Real-time Reconstruction Engine for Parallel MRI
Parallel MRI acquisitions are generally reconstructed into images off-line, on PCs and computer clusters. Here, we present an innovative single-FPGA engine that performs real-time 2D-FFT image reconstruction from arrays of up to 16 coils. Partial reconfiguration enables rapid switching of FPGA modules for maximal flexibility and lower hardware cost. If the engine is integrated on to an FPGA-bas...
متن کاملA Reconfigurable Real-time Image Reconstruction Engine for Parallel MRI
Parallel MRI acquisitions are generally reconstructed into images off-line, on PCs and computer clusters. Here, we present an innovative single-FPGA engine that performs realtime 2D-FFT image reconstruction from arrays of up to 16 coils. Partial reconfiguration enables rapid switching of FPGA modules for maximal flexibility and lower hardware cost. If the engine is integrated on to an FPGA-base...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2017